Design and Test of Integrated Inductors for RF Applications by Jaime Aguilera

By Jaime Aguilera

Design and try of built-in Inductors for RF Applications is meant for engineers who're beginning out within the layout of built-in inductors, this seeing that it describes the complete layout stream, uncomplicated choice of the geometry, optimisation of the standard by way of remodeling the geometry, size and de-embedding and characterisation. Secondly it's going to aid the fashion designer with a lot adventure during this box, this since, in accordance with empirical facts, a few layout principles which have been known through the layout group were proved to be quite conservative and breaking them leads as much as better caliber designs.

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Latter it has been shown that when a wire is within a system of conductors, like for example a spiral, the variation of the resistance versus frequency it is not only due to skin effects but also to proximity effects. 3 Parasitic effects in the substrate When an inductor is integrated on a Silicon based technology, some undesirable induced effects show up. The reason being that the metallic layers are separated from the semiconductor substrate by a layer of silicon 38 General considerations oxide.

This configuration is expected to achieve near optimum noise performance while providing a specific input and output impedance [Sha97]. 12 Introduction Let us consider now the simplified small signal equivalent circuit for the CMOS LNA (Figure 1-7). Design and test of integrated inductors for RF applications 13 Where is the transconductance of the transistor is the equivalent parallel inductance of the inductor L, is total capacitance due to the capacitor C and the terminal capacitances of the transistor is the total parallel resistance due to the output resistance of the cascode stage and the equivalent parallel resistance of inductor L, and finally is the source inductance of transistor From inspection of the circuit of Figure 1-7 and not considering the effect of we can obtain that the gain of the low noise amplifier at the frequency of interest, the frequency of resonance, is determined by the impedance of the LC tank and the transconductance of the input transistor.

6). 6 shows the importance of the LNA performance in the whole receiver chain. The LNA must provide enough gain to overcome the noise of the next stages, adding as little noise as possible. Once explained the importance of the LNA gain in the performance of the whole front-end let us analyse the typical LNA configuration. Figure 1-6 shows the most extended differential topology in Bipolar and CMOS technologies for narrow-band applications. It consists in a cascode stage and a LC tank. This configuration is expected to achieve near optimum noise performance while providing a specific input and output impedance [Sha97].

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